8 #ifndef _RTE_EVENTDEV_H_
9 #define _RTE_EVENTDEV_H_
240 #include <rte_compat.h>
252 #define RTE_EVENT_DEV_CAP_QUEUE_QOS (1ULL << 0)
270 #define RTE_EVENT_DEV_CAP_EVENT_QOS (1ULL << 1)
284 #define RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED (1ULL << 2)
294 #define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES (1ULL << 3)
318 #define RTE_EVENT_DEV_CAP_BURST_MODE (1ULL << 4)
329 #define RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE (1ULL << 5)
342 #define RTE_EVENT_DEV_CAP_NONSEQ_MODE (1ULL << 6)
354 #define RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK (1ULL << 7)
365 #define RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT (1ULL << 8)
375 #define RTE_EVENT_DEV_CAP_CARRY_FLOW_ID (1ULL << 9)
384 #define RTE_EVENT_DEV_CAP_MAINTENANCE_FREE (1ULL << 10)
397 #define RTE_EVENT_DEV_CAP_RUNTIME_QUEUE_ATTR (1ULL << 11)
407 #define RTE_EVENT_DEV_CAP_PROFILE_LINK (1ULL << 12)
421 #define RTE_EVENT_DEV_CAP_ATOMIC (1ULL << 13)
429 #define RTE_EVENT_DEV_CAP_ORDERED (1ULL << 14)
437 #define RTE_EVENT_DEV_CAP_PARALLEL (1ULL << 15)
445 #define RTE_EVENT_DEV_CAP_INDEPENDENT_ENQ (1ULL << 16)
464 #define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE (1ULL << 17)
476 #define RTE_EVENT_DEV_CAP_EVENT_PRESCHEDULE_ADAPTIVE (1ULL << 18)
488 #define RTE_EVENT_DEV_CAP_PER_PORT_PRESCHEDULE (1ULL << 19)
498 #define RTE_EVENT_DEV_CAP_PRESCHEDULE_EXPLICIT (1ULL << 20)
508 #define RTE_EVENT_DEV_PRIORITY_HIGHEST 0
515 #define RTE_EVENT_DEV_PRIORITY_NORMAL 128
522 #define RTE_EVENT_DEV_PRIORITY_LOWEST 255
531 #define RTE_EVENT_QUEUE_WEIGHT_HIGHEST 255
537 #define RTE_EVENT_QUEUE_WEIGHT_LOWEST 0
545 #define RTE_EVENT_QUEUE_AFFINITY_HIGHEST 255
551 #define RTE_EVENT_QUEUE_AFFINITY_LOWEST 0
708 #define RTE_EVENT_DEV_ATTR_PORT_COUNT 0
712 #define RTE_EVENT_DEV_ATTR_QUEUE_COUNT 1
716 #define RTE_EVENT_DEV_ATTR_STARTED 2
732 uint32_t *attr_value);
736 #define RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT (1ULL << 0)
876 #define RTE_EVENT_QUEUE_CFG_ALL_TYPES (1ULL << 0)
890 #define RTE_EVENT_QUEUE_CFG_SINGLE_LINK (1ULL << 1)
1040 #define RTE_EVENT_QUEUE_ATTR_PRIORITY 0
1044 #define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_FLOWS 1
1048 #define RTE_EVENT_QUEUE_ATTR_NB_ATOMIC_ORDER_SEQUENCES 2
1052 #define RTE_EVENT_QUEUE_ATTR_EVENT_QUEUE_CFG 3
1056 #define RTE_EVENT_QUEUE_ATTR_SCHEDULE_TYPE 4
1060 #define RTE_EVENT_QUEUE_ATTR_WEIGHT 5
1064 #define RTE_EVENT_QUEUE_ATTR_AFFINITY 6
1088 uint32_t *attr_value);
1111 uint64_t attr_value);
1116 #define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL (1ULL << 0)
1123 #define RTE_EVENT_PORT_CFG_SINGLE_LINK (1ULL << 1)
1131 #define RTE_EVENT_PORT_CFG_HINT_PRODUCER (1ULL << 2)
1141 #define RTE_EVENT_PORT_CFG_HINT_CONSUMER (1ULL << 3)
1152 #define RTE_EVENT_PORT_CFG_HINT_WORKER (1ULL << 4)
1163 #define RTE_EVENT_PORT_CFG_INDEPENDENT_ENQ (1ULL << 5)
1306 #define RTE_EVENT_PORT_ATTR_ENQ_DEPTH 0
1310 #define RTE_EVENT_PORT_ATTR_DEQ_DEPTH 1
1316 #define RTE_EVENT_PORT_ATTR_NEW_EVENT_THRESHOLD 2
1320 #define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
1341 uint32_t *attr_value);
1444 uint16_t elem_offset : 12;
1448 uint16_t attr_valid : 1;
1466 uint64_t impl_opaque;
1494 #define RTE_SCHED_TYPE_ORDERED 0
1532 #define RTE_SCHED_TYPE_ATOMIC 1
1559 #define RTE_SCHED_TYPE_PARALLEL 2
1573 #define RTE_EVENT_TYPE_ETHDEV 0x0
1575 #define RTE_EVENT_TYPE_CRYPTODEV 0x1
1577 #define RTE_EVENT_TYPE_TIMER 0x2
1579 #define RTE_EVENT_TYPE_CPU 0x3
1583 #define RTE_EVENT_TYPE_ETH_RX_ADAPTER 0x4
1585 #define RTE_EVENT_TYPE_DMADEV 0x5
1587 #define RTE_EVENT_TYPE_VECTOR 0x8
1599 #define RTE_EVENT_TYPE_ETHDEV_VECTOR \
1600 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_ETHDEV)
1602 #define RTE_EVENT_TYPE_CPU_VECTOR (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_CPU)
1604 #define RTE_EVENT_TYPE_ETH_RX_ADAPTER_VECTOR \
1605 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_ETH_RX_ADAPTER)
1607 #define RTE_EVENT_TYPE_CRYPTODEV_VECTOR \
1608 (RTE_EVENT_TYPE_VECTOR | RTE_EVENT_TYPE_CRYPTODEV)
1611 #define RTE_EVENT_TYPE_MAX 0x10
1615 #define RTE_EVENT_OP_NEW 0
1620 #define RTE_EVENT_OP_FORWARD 1
1632 #define RTE_EVENT_OP_RELEASE 2
1798 #define RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT 0x1
1802 #define RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ 0x2
1806 #define RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID 0x4
1813 #define RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR 0x8
1838 #define RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT (1ULL << 0)
1841 #define RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC (1ULL << 1)
1861 #define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW 0x1
1868 #define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_FWD 0x2
1875 #define RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND 0x4
1880 #define RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA 0x8
1885 #define RTE_EVENT_CRYPTO_ADAPTER_CAP_EVENT_VECTOR 0x10
1914 #define RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_NEW 0x1
1921 #define RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD 0x2
1928 #define RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_VCHAN_EV_BIND 0x4
1956 #define RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT 0x1
1959 #define RTE_EVENT_ETH_TX_ADAPTER_CAP_EVENT_VECTOR 0x2
2010 uint64_t *timeout_ticks);
2077 const uint8_t queues[],
const uint8_t priorities[],
2125 uint8_t queues[], uint16_t nb_unlinks);
2202 const uint8_t priorities[], uint16_t nb_links, uint8_t profile_id);
2255 uint16_t nb_unlinks, uint8_t profile_id);
2309 uint8_t queues[], uint8_t priorities[]);
2345 uint8_t priorities[], uint8_t profile_id);
2382 #define RTE_EVENT_DEV_XSTATS_NAME_SIZE 64
2388 RTE_EVENT_DEV_XSTATS_DEVICE,
2389 RTE_EVENT_DEV_XSTATS_PORT,
2390 RTE_EVENT_DEV_XSTATS_QUEUE,
2438 uint8_t queue_port_id,
2472 uint8_t queue_port_id,
2473 const uint64_t ids[],
2474 uint64_t values[],
unsigned int n);
2519 int16_t queue_port_id,
2520 const uint64_t ids[],
2570 #include <rte_eventdev_core.h>
2577 __rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id,
2578 const struct rte_event ev[], uint16_t nb_events,
2579 const event_enqueue_burst_t fn)
2581 const struct rte_event_fp_ops *fp_ops;
2584 fp_ops = &rte_event_fp_ops[dev_id];
2585 port = fp_ops->data[port_id];
2586 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2587 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2588 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV) {
2598 rte_eventdev_trace_enq_burst(dev_id, port_id, ev, nb_events, (
void *)fn);
2600 return fn(port, ev, nb_events);
2646 static inline uint16_t
2648 const struct rte_event ev[], uint16_t nb_events)
2650 const struct rte_event_fp_ops *fp_ops;
2652 fp_ops = &rte_event_fp_ops[dev_id];
2653 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
2654 fp_ops->enqueue_burst);
2698 static inline uint16_t
2700 const struct rte_event ev[], uint16_t nb_events)
2702 const struct rte_event_fp_ops *fp_ops;
2704 fp_ops = &rte_event_fp_ops[dev_id];
2705 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
2706 fp_ops->enqueue_new_burst);
2750 static inline uint16_t
2752 const struct rte_event ev[], uint16_t nb_events)
2754 const struct rte_event_fp_ops *fp_ops;
2756 fp_ops = &rte_event_fp_ops[dev_id];
2757 return __rte_event_enqueue_burst(dev_id, port_id, ev, nb_events,
2758 fp_ops->enqueue_forward_burst);
2827 static inline uint16_t
2829 uint16_t nb_events, uint64_t timeout_ticks)
2831 const struct rte_event_fp_ops *fp_ops;
2834 fp_ops = &rte_event_fp_ops[dev_id];
2835 port = fp_ops->data[port_id];
2836 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2837 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2838 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV) {
2848 rte_eventdev_trace_deq_burst(dev_id, port_id, ev, nb_events);
2850 return (fp_ops->dequeue_burst)(port, ev, nb_events, timeout_ticks);
2853 #define RTE_EVENT_DEV_MAINT_OP_FLUSH (1 << 0)
2898 const struct rte_event_fp_ops *fp_ops;
2901 fp_ops = &rte_event_fp_ops[dev_id];
2902 port = fp_ops->data[port_id];
2903 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2904 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2905 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
2914 rte_eventdev_trace_maintain(dev_id, port_id, op);
2916 if (fp_ops->maintain != NULL)
2917 fp_ops->maintain(port, op);
2943 static inline uint8_t
2946 const struct rte_event_fp_ops *fp_ops;
2949 fp_ops = &rte_event_fp_ops[dev_id];
2950 port = fp_ops->data[port_id];
2952 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
2953 if (dev_id >= RTE_EVENT_MAX_DEVS ||
2954 port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
2960 if (profile_id >= RTE_EVENT_MAX_PROFILES_PER_PORT)
2963 rte_eventdev_trace_port_profile_switch(dev_id, port_id, profile_id);
2965 return fp_ops->profile_switch(port, profile_id);
2996 const struct rte_event_fp_ops *fp_ops;
2999 fp_ops = &rte_event_fp_ops[dev_id];
3000 port = fp_ops->data[port_id];
3002 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
3003 if (dev_id >= RTE_EVENT_MAX_DEVS || port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
3009 rte_eventdev_trace_port_preschedule_modify(dev_id, port_id, type);
3011 return fp_ops->preschedule_modify(port, type);
3040 const struct rte_event_fp_ops *fp_ops;
3043 fp_ops = &rte_event_fp_ops[dev_id];
3044 port = fp_ops->data[port_id];
3046 #ifdef RTE_LIBRTE_EVENTDEV_DEBUG
3047 if (dev_id >= RTE_EVENT_MAX_DEVS || port_id >= RTE_EVENT_MAX_PORTS_PER_DEV)
3052 rte_eventdev_trace_port_preschedule(dev_id, port_id, type);
3054 fp_ops->preschedule(port, type);
#define __rte_always_inline
struct __rte_aligned(16) rte_event_vector
int rte_event_port_links_get(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint8_t priorities[])
int rte_event_port_unlinks_in_progress(uint8_t dev_id, uint8_t port_id)
int rte_event_queue_attr_set(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, uint64_t attr_value)
static __rte_experimental int rte_event_port_preschedule_modify(uint8_t dev_id, uint8_t port_id, enum rte_event_dev_preschedule_type type)
void(* rte_eventdev_port_flush_t)(uint8_t dev_id, struct rte_event event, void *arg)
int rte_event_dequeue_timeout_ticks(uint8_t dev_id, uint64_t ns, uint64_t *timeout_ticks)
int rte_event_port_link(uint8_t dev_id, uint8_t port_id, const uint8_t queues[], const uint8_t priorities[], uint16_t nb_links)
static uint16_t rte_event_enqueue_forward_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
static uint16_t rte_event_dequeue_burst(uint8_t dev_id, uint8_t port_id, struct rte_event ev[], uint16_t nb_events, uint64_t timeout_ticks)
int rte_event_dev_service_id_get(uint8_t dev_id, uint32_t *service_id)
static uint8_t rte_event_port_profile_switch(uint8_t dev_id, uint8_t port_id, uint8_t profile_id)
rte_event_dev_xstats_mode
__rte_experimental int rte_event_port_profile_links_set(uint8_t dev_id, uint8_t port_id, const uint8_t queues[], const uint8_t priorities[], uint16_t nb_links, uint8_t profile_id)
int rte_event_eth_rx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, uint32_t *caps)
int rte_event_queue_setup(uint8_t dev_id, uint8_t queue_id, const struct rte_event_queue_conf *queue_conf)
int rte_event_queue_default_conf_get(uint8_t dev_id, uint8_t queue_id, struct rte_event_queue_conf *queue_conf)
int rte_event_dev_selftest(uint8_t dev_id)
int rte_event_dev_info_get(uint8_t dev_id, struct rte_event_dev_info *dev_info)
int rte_event_dev_stop_flush_callback_register(uint8_t dev_id, rte_eventdev_stop_flush_t callback, void *userdata)
void rte_event_dev_stop(uint8_t dev_id)
uint8_t rte_event_dev_count(void)
rte_event_dev_preschedule_type
@ RTE_EVENT_PRESCHEDULE_ADAPTIVE
@ RTE_EVENT_PRESCHEDULE_NONE
int rte_event_crypto_adapter_caps_get(uint8_t dev_id, uint8_t cdev_id, uint32_t *caps)
void rte_event_port_quiesce(uint8_t dev_id, uint8_t port_id, rte_eventdev_port_flush_t release_cb, void *args)
int rte_event_dev_xstats_reset(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, int16_t queue_port_id, const uint64_t ids[], uint32_t nb_ids)
int rte_event_dev_dump(uint8_t dev_id, FILE *f)
int rte_event_timer_adapter_caps_get(uint8_t dev_id, uint32_t *caps)
int rte_event_dev_attr_get(uint8_t dev_id, uint32_t attr_id, uint32_t *attr_value)
int rte_event_dev_get_dev_id(const char *name)
uint64_t rte_event_dev_xstats_by_name_get(uint8_t dev_id, const char *name, uint64_t *id)
int rte_event_dev_xstats_get(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id, const uint64_t ids[], uint64_t values[], unsigned int n)
#define RTE_EVENT_DEV_MAINT_OP_FLUSH
static uint16_t rte_event_enqueue_new_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
void(* rte_eventdev_stop_flush_t)(uint8_t dev_id, struct rte_event event, void *arg)
int rte_event_queue_attr_get(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, uint32_t *attr_value)
__rte_experimental int rte_event_port_profile_links_get(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint8_t priorities[], uint8_t profile_id)
struct rte_mempool * rte_event_vector_pool_create(const char *name, unsigned int n, unsigned int cache_size, uint16_t nb_elem, int socket_id)
static int rte_event_maintain(uint8_t dev_id, uint8_t port_id, int op)
int rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id, uint32_t *attr_value)
int rte_event_dev_start(uint8_t dev_id)
int rte_event_port_default_conf_get(uint8_t dev_id, uint8_t port_id, struct rte_event_port_conf *port_conf)
int rte_event_dev_xstats_names_get(uint8_t dev_id, enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id, struct rte_event_dev_xstats_name *xstats_names, uint64_t *ids, unsigned int size)
int rte_event_port_setup(uint8_t dev_id, uint8_t port_id, const struct rte_event_port_conf *port_conf)
__rte_experimental int rte_event_dma_adapter_caps_get(uint8_t dev_id, uint8_t dmadev_id, uint32_t *caps)
int rte_event_eth_tx_adapter_caps_get(uint8_t dev_id, uint16_t eth_port_id, uint32_t *caps)
int rte_event_port_unlink(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint16_t nb_unlinks)
__rte_experimental int rte_event_port_profile_unlink(uint8_t dev_id, uint8_t port_id, uint8_t queues[], uint16_t nb_unlinks, uint8_t profile_id)
#define RTE_EVENT_DEV_XSTATS_NAME_SIZE
int rte_event_dev_socket_id(uint8_t dev_id)
int rte_event_dev_configure(uint8_t dev_id, const struct rte_event_dev_config *dev_conf)
int rte_event_dev_close(uint8_t dev_id)
static __rte_experimental void rte_event_port_preschedule(uint8_t dev_id, uint8_t port_id, enum rte_event_dev_preschedule_type type)
static uint16_t rte_event_enqueue_burst(uint8_t dev_id, uint8_t port_id, const struct rte_event ev[], uint16_t nb_events)
uint32_t dequeue_timeout_ns
enum rte_event_dev_preschedule_type preschedule_type
uint8_t nb_single_link_event_port_queues
uint32_t nb_event_port_enqueue_depth
uint32_t nb_event_queue_flows
uint32_t nb_event_port_dequeue_depth
uint8_t max_event_port_links
uint32_t max_event_port_enqueue_depth
uint32_t dequeue_timeout_ns
uint32_t min_dequeue_timeout_ns
uint32_t max_event_queue_flows
uint8_t max_event_port_dequeue_depth
uint8_t max_event_queue_priority_levels
uint8_t max_profiles_per_port
uint8_t max_event_priority_levels
uint32_t max_dequeue_timeout_ns
uint8_t max_single_link_event_port_queue_pairs
int32_t new_event_threshold
uint32_t nb_atomic_order_sequences
struct rte_event_vector * vec
char name[RTE_MEMPOOL_NAMESIZE]