Intel(R) Threading Building Blocks Doxygen Documentation version 4.2.3
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gcc_itsx.h
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1/*
2 Copyright (c) 2005-2020 Intel Corporation
3
4 Licensed under the Apache License, Version 2.0 (the "License");
5 you may not use this file except in compliance with the License.
6 You may obtain a copy of the License at
7
8 http://www.apache.org/licenses/LICENSE-2.0
9
10 Unless required by applicable law or agreed to in writing, software
11 distributed under the License is distributed on an "AS IS" BASIS,
12 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 See the License for the specific language governing permissions and
14 limitations under the License.
15*/
16
17#if !defined(__TBB_machine_H) || defined(__TBB_machine_gcc_itsx_H)
18#error Do not #include this internal file directly; use public TBB headers instead.
19#endif
20
21#define __TBB_machine_gcc_itsx_H
22
23#define __TBB_OP_XACQUIRE 0xF2
24#define __TBB_OP_XRELEASE 0xF3
25#define __TBB_OP_LOCK 0xF0
26
27#define __TBB_STRINGIZE_INTERNAL(arg) #arg
28#define __TBB_STRINGIZE(arg) __TBB_STRINGIZE_INTERNAL(arg)
29
30#ifdef __TBB_x86_64
31#define __TBB_r_out "=r"
32#else
33#define __TBB_r_out "=q"
34#endif
35
36inline static uint8_t __TBB_machine_try_lock_elided( volatile uint8_t* lk )
37{
38 uint8_t value = 1;
39 __asm__ volatile (".byte " __TBB_STRINGIZE(__TBB_OP_XACQUIRE)"; lock; xchgb %0, %1;"
40 : __TBB_r_out(value), "=m"(*lk) : "0"(value), "m"(*lk) : "memory" );
41 return uint8_t(value^1);
42}
43
45{
46 // 'pause' instruction aborts HLE/RTM transactions
47 __asm__ volatile ("pause\n" : : : "memory" );
48}
49
50inline static void __TBB_machine_unlock_elided( volatile uint8_t* lk )
51{
52 __asm__ volatile (".byte " __TBB_STRINGIZE(__TBB_OP_XRELEASE)"; movb $0, %0"
53 : "=m"(*lk) : "m"(*lk) : "memory" );
54}
55
56#if __TBB_TSX_INTRINSICS_PRESENT
57#include <immintrin.h>
58
59#define __TBB_machine_is_in_transaction _xtest
60#define __TBB_machine_begin_transaction _xbegin
61#define __TBB_machine_end_transaction _xend
62#define __TBB_machine_transaction_conflict_abort() _xabort(0xff)
63
64#else
65
70{
71 int8_t res = 0;
72#if __TBB_x86_32
73 __asm__ volatile (".byte 0x0F; .byte 0x01; .byte 0xD6;\n"
74 "setz %0" : "=q"(res) : : "memory" );
75#else
76 __asm__ volatile (".byte 0x0F; .byte 0x01; .byte 0xD6;\n"
77 "setz %0" : "=r"(res) : : "memory" );
78#endif
79 return res==0;
80}
81
87inline static uint32_t __TBB_machine_begin_transaction()
88{
89 uint32_t res = ~uint32_t(0); // success value
90 __asm__ volatile ("1: .byte 0xC7; .byte 0xF8;\n" // XBEGIN <abort-offset>
91 " .long 2f-1b-6\n" // 2f-1b == difference in addresses of start
92 // of XBEGIN and the MOVL
93 // 2f - 1b - 6 == that difference minus the size of the
94 // XBEGIN instruction. This is the abort offset to
95 // 2: below.
96 " jmp 3f\n" // success (leave -1 in res)
97 "2: movl %%eax,%0\n" // store failure code in res
98 "3:"
99 :"=r"(res):"0"(res):"memory","%eax");
100 return res;
101}
102
107{
108 __asm__ volatile (".byte 0x0F; .byte 0x01; .byte 0xD5" :::"memory"); // XEND
109}
110
111/*
112 * aborts with code 0xFF (lock already held)
113 */
115{
116 __asm__ volatile (".byte 0xC6; .byte 0xF8; .byte 0xFF" :::"memory");
117}
118
119#endif /* __TBB_TSX_INTRINSICS_PRESENT */
static void __TBB_machine_try_lock_elided_cancel()
Definition gcc_itsx.h:44
static void __TBB_machine_transaction_conflict_abort()
Definition gcc_itsx.h:114
static void __TBB_machine_unlock_elided(volatile uint8_t *lk)
Definition gcc_itsx.h:50
static uint8_t __TBB_machine_try_lock_elided(volatile uint8_t *lk)
Definition gcc_itsx.h:36
#define __TBB_r_out
Definition gcc_itsx.h:33
#define __TBB_OP_XACQUIRE
Definition gcc_itsx.h:23
#define __TBB_STRINGIZE(arg)
Definition gcc_itsx.h:28
static bool __TBB_machine_is_in_transaction()
Definition gcc_itsx.h:69
static uint32_t __TBB_machine_begin_transaction()
Definition gcc_itsx.h:87
#define __TBB_OP_XRELEASE
Definition gcc_itsx.h:24
static void __TBB_machine_end_transaction()
Definition gcc_itsx.h:106
void const char const char int ITT_FORMAT __itt_group_sync x void const char ITT_FORMAT __itt_group_sync s void ITT_FORMAT __itt_group_sync p void ITT_FORMAT p void ITT_FORMAT p no args __itt_suppress_mode_t unsigned int void size_t ITT_FORMAT d void ITT_FORMAT p void ITT_FORMAT p __itt_model_site __itt_model_site_instance ITT_FORMAT p __itt_model_task __itt_model_task_instance ITT_FORMAT p void ITT_FORMAT p void ITT_FORMAT p void size_t ITT_FORMAT d void ITT_FORMAT p const wchar_t ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s const char ITT_FORMAT s no args void ITT_FORMAT p size_t ITT_FORMAT d no args const wchar_t const wchar_t ITT_FORMAT s __itt_heap_function void size_t int ITT_FORMAT d __itt_heap_function void ITT_FORMAT p __itt_heap_function void void size_t int ITT_FORMAT d no args no args unsigned int ITT_FORMAT u const __itt_domain __itt_id ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain __itt_id ITT_FORMAT p const __itt_domain __itt_id __itt_timestamp __itt_timestamp ITT_FORMAT lu const __itt_domain __itt_id __itt_id __itt_string_handle ITT_FORMAT p const __itt_domain ITT_FORMAT p const __itt_domain __itt_string_handle unsigned long long value

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