class RgGen::SystemVerilog::Common::Utility::ModuleDefinition

Public Instance Methods

package_import(package) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 19
def package_import(package)
  package_imports([package])
end
package_imports(packages) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 14
def package_imports(packages)
  @package_imports ||= []
  @package_imports.concat(Array(packages))
end

Private Instance Methods

header_code(code) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 25
def header_code(code)
  module_header_begin(code)
  package_import_declaration(code)
  parameter_declarations(code)
  port_declarations(code)
  module_header_end(code)
end
module_header_begin(code) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 33
def module_header_begin(code)
  code << 'module' << space << name
end
module_header_end(code) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 69
def module_header_end(code)
  code << semicolon
end
pacakge_import_items() click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 45
def pacakge_import_items
  Array(@package_imports).map.with_index do |package, i|
    if i.zero?
      ['import', "#{package}::*"].join(space)
    else
      [space(6), "#{package}::*"].join(space)
    end
  end
end
package_import_declaration(code) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 37
def package_import_declaration(code)
  if (items = pacakge_import_items).empty?
    code << space
    return
  end
  add_declarations_to_header(code, items, semicolon)
end
parameter_declarations(code) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 55
def parameter_declarations(code)
  declarations = Array(parameters)
  declarations.empty? || wrap(code, '#(', ')') do
    add_declarations_to_header(code, declarations)
  end
end
port_declarations(code) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 62
def port_declarations(code)
  declarations = Array(ports)
  wrap(code, '(', ')') do
    add_declarations_to_header(code, declarations)
  end
end
pre_body_code(code) click to toggle source
# File lib/rggen/systemverilog/common/utility/module_definition.rb, line 73
def pre_body_code(code)
  add_declarations_to_body(code, Array(variables))
end