class RTL::Circuit
Attributes
color[RW]
components[RW]
father[RW]
iname[RW]
name[RW]
ports[RW]
properties[RW]
signals[RW]
Public Class Methods
new(name=nil)
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# File lib/rtl/circuit.rb, line 14 def initialize name=nil @name=name @iname="#{name}_#{@@id+=1}" @ports={in:[],out:[]} @signals=[] @components=[] @properties={} @color="cadetblue" end
Public Instance Methods
add(element)
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# File lib/rtl/circuit.rb, line 24 def add element port=circuit=sig=element case element when Sig @signals<< sig sig.circuit=self when Port @ports[port.dir] << port port.circuit=self when Circuit @components << circuit circuit.father=self else raise "ERROR : when adding '#{element}'" end end
component_named(name)
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# File lib/rtl/circuit.rb, line 50 def component_named name @components.find{|comp| comp.iname==name} end
inputs()
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# File lib/rtl/circuit.rb, line 54 def inputs @ports[:in] end
make_lib()
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# File lib/rtl/circuit.rb, line 79 def make_lib filename="#{name}.lib" File.open(filename,'w') do |f| f.puts Marshal.dump(self) end end
new_instance()
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# File lib/rtl/circuit.rb, line 70 def new_instance @@clone_id||={} @@clone_id[name]||=-1 @@clone_id[name]+=1 clone=Marshal.load(Marshal.dump(self)) clone.iname=self.name+"_#{@@clone_id[name]}" clone end
outputs()
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# File lib/rtl/circuit.rb, line 58 def outputs @ports[:out] end
port(name)
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# File lib/rtl/circuit.rb, line 45 def port name all=@ports[:in]+@ports[:out] all.flatten.find{|p| p.name==name} end
port_named(dir,name)
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# File lib/rtl/circuit.rb, line 41 def port_named dir,name @ports[dir].find{|p| p.name==name} end
to_dot()
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# File lib/rtl/circuit.rb, line 86 def to_dot Printer.new.print self end
wires()
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# File lib/rtl/circuit.rb, line 62 def wires wires=[] wires << inputs.map{|p| p.fanout} wires << signals.map{|p| p.fanout} wires << components.map{|comp| comp.outputs.map{|o| o.fanout}} wires.flatten end