Mthread.Mt_shared_vars
module type Computer = sig ... end
module Global :
Computer
with module Access = Mt_shared_vars_types.StmtIdAccess
and module Set = Mt_shared_vars_types.SetStmtIdAccess
module Precise : sig ... end
val read_written_by_thread :
?watch_only:Frama_c_kernel.Locations.Zone.t ->
(Frama_c_kernel.Cil_types.stmt -> bool) ->
Eva__.Thread.t ->
Mt_shared_vars_types.AccessesByZone.map
val register_concurrent_var_accesses :
Mt_thread.analysis_state ->
[< `Final of Mt_memory.Types.functions_states
| `Leaf of Mt_memory.Types.state ] ->
unit
val stmt_is_multithreaded :
Mt_thread.analysis_state ->
Mt_memory.Types.state_accesser ->
Frama_c_kernel.Cil_types.stmt ->
bool
val var_thread_created : unit -> Frama_c_kernel.Cil_types.varinfo